HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 235

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Two types of transfers are possible in the single address mode: (a) transfers between external
devices with DACK and memory-mapped external devices, and (b) transfers between external
devices with DACK and external memory. The only transfer requests for either of these is the
external request (DREQ). Figure 10.5 shows the DMA transfer timing for the single address
mode.
Figure 10.5 Example of DMA Transfer Timing in Single Address Mode
D15–D0
D15–D0
A21–A0
A21–A0
DACK
DACK
WRH
WRL
CSn
CSn
RD
CK
CK
b. External memory space to external device with DACK
a. External device with DACK to external memory space
Address output to external memory space
Data that is output from external memory space
RD signal to external memory space
DACK signal to external device with DACK
(active low)
Address output to external memory space
Data that is output from the external
device with DACK
WR signal to external memory space
DACK signal to external devices with
DACK (active low)
10. Direct Memory Access Controller (DMAC)
Rev.4.00 Mar. 27, 2008 Page 189 of 882
REJ09B0108-0400