HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 737

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
This LSI has an on-chip high-speed static RAM. The on-chip RAM is connected to the CPU,
direct memory access controller (DMAC), data transfer controller (DTC), and advanced user
debugger (AUD)* by a 32-bit data bus, enabling 8, 16, or 32-bit width access to data in the on-
chip RAM. Data in the on-chip RAM can always be accessed in one cycle, providing high-speed
access that makes this RAM ideal for use as a program area, stack area, or data area. The on-chip
RAM is allocated to address H'FFFFE000 to H'FFFFFFFF. The contents of the on-chip RAM are
retained in sleep mode and standby mode, and by a power-on reset and a manual reset.
The on-chip RAM can be enabled or disabled by means of the RAME bit in the system control
register (SYSCR). For details on the system control register (SYSCR), refer to section 24.2.2,
System Control Register (SYSCR).
Note: * Flash version only.
21.1
• Module Standby Mode Setting
RAM0200A_010020030800
RAM can be enabled/disabled by the module standby control register (MSTCR1). The initial
value enables RAM operation. RAM access is disabled by setting the module standby mode.
For details, see section 24, Power-Down Modes.
Usage Note
Section 21 RAM
Rev.4.00 Mar. 27, 2008 Page 691 of 882
REJ09B0108-0400
21. RAM

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