HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 417

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit
15
14
13
12
11 to 9 ⎯
Bit Name Initial value
POE3F
POE2F
POE1F
POE0F
0
0
0
0
All 0
R/(W)* POE3 Flag
R/(W)* POE2 Flag
R/(W)* POE1 Flag
R/(W)* POE0 Flag
R
R/W
Description
This flag indicates that a high impedance request has
been input to the POE3 pin
[Clearing condition]
[Setting condition]
This flag indicates that a high impedance request has
been input to the POE2 pin
[Clearing condition]
[Setting condition]
This flag indicates that a high impedance request has
been input to the POE1 pin
[Clearing condition]
[Setting condition]
This flag indicates that a high impedance request has
been input to the POE0 pin
[Clear condition]
[Set condition]
Reserved
These bits are always read as 0. The write value
should always be 0.
By writing 0 to POE3F after reading a POE3F = 1
When the input set by ICSR1 bits 7 and 6 occurs
at the POE3 pin
By writing 0 to POE2F after reading a POE2F = 1
When the input set by ICSR1 bits 5 and 4 occurs
at the POE2 pin
By writing 0 to POE1F after reading a POE1F = 1
When the input set by ICSR1 bits 3 and 2 occurs
at the POE1 pin
By writing 0 to POE0F after reading a POE0F = 1
When the input set by ICSR1 bits 1 and 0 occurs
at the POE0 pin
11.
Rev.4.00 Mar. 27, 2008 Page 371 of 882
Multi-Function Timer Pulse Unit (MTU)
REJ09B0108-0400

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