HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 205

IC SUPERH MCU ROMLESS 112QFP

HD6417144F50V

Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet

Specifications of HD6417144F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bits IW31 and IW30 in BCR2 specify the number of idle cycles inserted in the case of a write
cycle to CS3 and CS7 spaces or a read access to different space after CS3 and CS7 space read.
Bits IW21 and IW20 specify the number of idle cycles inserted for CS2 and CS6 spaces, bits
IW11 and IW10 specify for CS1 and CS5 spaces, and bits IW01 and IW00 specify for CS0 and
CS4 spaces, respectively.
Address
WRxx
CSm
Data
CSn
RD
CK
Figure 9.7 Example of Idle Cycle Insertion
T1
CSn space read
T2
Idle cycles
Tidle
Rev.4.00 Mar. 27, 2008 Page 159 of 882
CSm space write
T1
9. Bus State Controller (BSC)
T2
REJ09B0108-0400

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