HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 686

• Manufacturer Part Number: HD6417144F50V
• Description: IC SUPERH MCU ROMLESS 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7144r

Specifications of HD6417144F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

18. I/O Ports
18.2.2
The port B data register (PBDR) is a 16-bit readable/writable register that stores port B data. Bits
PB9DR to PB0DR correspond to pins PB9 to PB0 (multiplexed functions omitted here).
When a pin functions is a general output, if a value is written to PBDR, that value is output
directly from the pin, and if PBDR is read, the register value is returned directly regardless of the
pin state.
When a pin functions is a general input, if PBDR is read, the pin state, not the register value, is
returned directly. If a value is written to PBDR, although that value is written into PBDR, it does
not affect the pin state. Table 18.2 summarizes port B data register read/write operations.
Rev.4.00 Mar. 27, 2008 Page 640 of 882
REJ09B0108-0400
Bit
15 to
10
9
8
7
6
5
4
3
2
1
0
Bit Name Initial Value
—
PB9DR
PB8DR
PB7DR
PB6DR
PB5DR
PB4DR
PB3DR
PB2DR
PB1DR
PB0DR
Port B Data Register (PBDR)
All 0
0
0
0
0
0
0
0
0
0
0
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
See table 18.2