HD6417144F50V Renesas Electronics America, HD6417144F50V Datasheet - Page 309
HD6417144F50V
Manufacturer Part Number
HD6417144F50V
Description
IC SUPERH MCU ROMLESS 112QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7144r
Datasheet
1.HD64F7144F50V.pdf
(932 pages)
Specifications of HD6417144F50V
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
74
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
112-QFP
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)EDK7145 - DEV EVALUATION KIT SH7145
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417144F50V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Input Capture Function:
The TCNT value can be transferred to TGR on detection of the TIOC pin input edge.
Rising edge, falling edge, or both edges can be selected as the detected edge. For channels 0 and 1,
it is also possible to specify another channel's counter input clock or compare match signal as the
input capture source.
Note: When another channel's counter input clock is used as the input capture input for channels
1. Example of Input Capture Operation Setting Procedure
2. Example of Input Capture Operation:
Figure 11.9 shows an example of the input capture operation setting procedure.
Figure 11.10 shows an example of input capture operation.
In this example both rising and falling edges have been selected as the TIOCA pin input
capture input edge, the falling edge has been selected as the TIOCB pin input capture input
edge, and counter clearing by TGRB input capture has been designated for TCNT.
0 and 1, Pφ/1 should not be selected as the counter input clock used for input capture
input. Input capture will not be generated if Pφ/1 is selected.
Figure 11.9
<Input capture operation>
Select input capture input
Input selection
Start count
Example of Input Capture Operation Setting Procedure
[1]
[2]
[1] Designate TGR as an input capture
[2] Set the CST bit in TSTR to 1 to start
11.
register by means of TIOR, and select
rising edge, falling edge, or both edges
as the input capture source and input
signal edge.
the count operation.
Rev.4.00 Mar. 27, 2008 Page 263 of 882
Multi-Function Timer Pulse Unit (MTU)
REJ09B0108-0400
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