HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 256

• Manufacturer Part Number: HD64F2145BTE20
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2145BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 8 I/O Ports
8.10.1
P9DDR specifies input or output for the pins of port 9 on a bit-by-bit basis.
Note:
Rev. 3.00 Mar 21, 2006 page 200 of 788
REJ09B0300-0300
Bit
7
6
5
4
3
2
1
0
* The initial value of P96DDR is 1 (mode 1) or 0 (modes 2 and 3).
Bit Name
P97DDR
P96DDR
P95DDR
P94DDR
P93DDR
P92DDR
P91DDR
P90DDR
Port 9 Data Direction Register (P9DDR)
Initial
Value
0
1/0 *
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
Description
P9DDR is initialized to H'40 (mode 1) or H'00 (modes 2
and 3).
Modes 1, 2, and 3 (EXPE = 1):
Pin P97 functions as a bus control input (WAIT), the
IIC_0 I/O pin (SDA0), or an I/O port, according to the wait
mode setting. When P97 functions as an I/O port, it
becomes an output port when P97DDR is set to 1, and
an input port when P97DDR is cleared to 0.
Pin P96 functions as the
set to 1, and as the subclock input (EXCL) or an input
port when P96DDR is cleared to 0.
Pins P95 to P93 automatically become bus control
outputs (AS/IOS, HWR, RD), regardless of the
input/output direction indicated by P95DDR to P93DDR.
Pins P92 and P91 become output ports when P92DDR
and P91DDR are set to 1, and input ports when P92DDR
and P91DDR are cleared to 0.
When the ABW bit in WSCR is cleared to 0, pin P90
becomes a bus control output (LWR), regardless of the
input/output direction indicated by P90DDR. When the
ABW bit is 1, pin P90 becomes an output port if P90DDR
is set to 1, and an input port if P90DDR is cleared to 0.
Modes 2 and 3 (EXPE = 0):
When the corresponding P9DDR bits are set to 1, pin
P96 functions as the
to P90 become output ports. When P9DDR bits are
cleared to 0, the corresponding pins become input ports.
output pin and pins P97 and P95
output pin when P96DDR is