HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 445

• Manufacturer Part Number: HD64F2145BTE20
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2145BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Figure 15.11 Sample Multiprocessor Serial Transmission Flowchart
Clear DR to 0 and set DDR to 1
Write transmit data to TDR and
Read TDRE flag in SSR
Read TEND flag in SSR
Clear TE bit in SCR to 0
Clear TDRE flag to 0
set MPBT bit in SSR
All data transmitted?
Start transmission
Break output?
Initialization
TDRE = 1
TEND = 1
<End>
Yes
Yes
Yes
Yes
Section 15 Serial Communication Interface (SCI and IrDA)
No
No
No
No
[1]
[2]
[3]
[4]
[1] SCI initialization:
[2] SCI status check and transmit
[3] Serial transmission continuation
[4] Break output at the end of serial
Rev. 3.00 Mar 21, 2006 page 389 of 788
The TxD pin is automatically
designated as the transmit data
output pin.
After the TE bit is set to 1, a
frame of 1s is output, and
transmission is enabled.
data write:
Read SSR and check that the
TDRE flag is set to 1, then write
transmit data to TDR. Set the
MPBT bit in SSR to 0 or 1.
Finally, clear the TDRE flag to 0.
procedure:
To continue serial transmission,
be sure to read 1 from the TDRE
flag to confirm that writing is
possible, then write data to TDR,
and then clear the TDRE flag to 0.
However, the TDRE flag is
checked and cleared
automatically when the DTC is
initiated by a transmit data empty
interrupt (TXI) request and writes
data to TDR.
transmission:
To output a break in serial
transmission, set port DDR to 1,
clear DR to 0, and then clear the
TE bit in SCR to 0.
REJ09B0300-0300