HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 463

• Manufacturer Part Number: HD64F2145BTE20
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2145BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

15.9.6
When an external clock source is used as a synchronization clock, update TDR by the DTC or
RFU and wait for at least five clock cycles before allowing the transmit clock to be input. If the
transmit clock is input within four clock cycles after TDR modification, the SCI may malfunction
(figure 15.23).
When using the DTC to read RDR, be sure to set the receive end interrupt source (RXI) as a DTC
activation source.
15.9.7
Transmission: Before making a transition to module stop, software standby, or sub-sleep mode,
stop all transmit operations (TE = TIE = TEIE = 0). TSR, TDR, and SSR are reset. The states of
the output pins during each mode depend on the port settings, and the pins output a high-level
signal after mode cancellation. If a transition is made during data transmission, the data being
transmitted will be undefined.
To transmit data in the same transmission mode after mode cancellation, set TE to 1, read SSR,
write to TDR, clear TDRE in this order, and then start transmission. To transmit data in a different
transmission mode, initialize the SCI first.
Figure 15.24 shows a sample flowchart for mode transition during transmission. Figures 15.25 and
15.26 show the pin states during transmission.
Before making a transition from the transmission mode using DTC transfer to module stop,
software standby, or sub-sleep mode, stop all transmit operations (TE = TIE = TEIE = 0). Setting
TE and TIE to 1 after mode cancellation generates a TXI interrupt request to start transmission
using the DTC.
Figure 15.23 Example of Transmission Using DTC in Clocked Synchronous Mode
Restrictions on Using DTC
SCI Operations during Mode Transitions
SCK
TDRE
Serial data
Note: * When external clock is supplied, t must be more than four clock cycles.
t
LSB
D0
D1
Section 15 Serial Communication Interface (SCI and IrDA)
D2
D3
Rev. 3.00 Mar 21, 2006 page 407 of 788
D4
D5
D6
D7
REJ09B0300-0300