HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 548

• Manufacturer Part Number: HD64F2145BTE20
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2145BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 17 Keyboard Buffer Controller
17.3
The keyboard buffer controller has the following registers for each channel.
17.3.1
KBCRH indicates the operating status of the keyboard buffer controller.
Bit
7
6
5
4
Rev. 3.00 Mar 21, 2006 page 492 of 788
REJ09B0300-0300
Keyboard control register H (KBCRH)
Keyboard control register L (KBCRL)
Keyboard data buffer register (KBBR)
Bit Name
KBIOE
KCLKI
KDI
KBFSEL
Register Descriptions
Keyboard Control Register H (KBCRH)
Initial Value
0
1
1
1
R/W
R/W
R
R
R/W
Description
Keyboard In/Out Enable
Selects whether or not the keyboard buffer controller
is used.
0: The keyboard buffer controller is non-operational
1: The keyboard buffer controller is enabled for
Keyboard Clock In
Monitors the KCLK I/O pin. This bit cannot be
modified.
0: KCLK I/O pin is low
1: KCLK I/O pin is high
Keyboard Data In
Monitors the KDI I/O pin. This bit cannot be modified.
0: KD I/O pin is low
1: KD I/O pin is high
Keyboard Buffer Register Full Select
Selects whether the KBF bit is used as the keyboard
buffer register full flag or as the KCLK fall interrupt
flag. When KBFSEL is cleared to 0, the KBE bit in
KBCRL should be cleared to 0 to disable reception.
0: KBF bit is used as KCLK fall interrupt flag
1: KBF bit is used as keyboard buffer register full flag
(KCLK and KD signal pins have port functions)
transmission and reception (KCLK and KD signal
pins are in the bus drive state)