HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 596

IC H8S MCU FLASH 256K 100-QFP

HD64F2145BTE20

Manufacturer Part Number
HD64F2145BTE20
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2145BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 19 Host Interface LPC Interface (LPC)
Bit
1
0
19.3.2
Bits 6 to 0 in HICR2 control interrupts from the host interface (LPC) module to the slave
processor (this LSI). Bit 7 in HICR2 and HICR3 monitor host interface pin states.
The pin states can be monitored regardless of the host interface operating state or the operating
state of the functions that use pin multiplexing.
Bit
7
6
Rev. 3.00 Mar 21, 2006 page 540 of 788
REJ09B0300-0300
HICR2
Bit Name Initial Value Slave Host Description
LSMIB
LSCIB
Bit Name Initial Value Slave Host Description
GA20
LRST
Host Interface Control Registers 2 and 3 (HICR2, HICR3)
0
0
Undefined
0
R/W
R/W
R
R/(W) * —
R/W
R/W
LSMI Output Bit
Controls LSMI output in combination with the LSMIE
bit. For details, refer to description on the LSMIE bit
in HICR0.
LSCI output Bit
Controls LSCI output in combination with the LSCIE
bit. For details, refer to description on the LSCIE bit
in HICR0.
GA20 Pin Monitor
LPC Reset Interrupt Flag
This bit is a flag that generates an ERRI interrupt
when an LPC hardware reset occurs.
0: [Clearing condition]
Writing 0 after reading LRST = 1
1: [Setting condition]
LRESET pin falling edge detection

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