HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 689

IC H8S MCU FLASH 256K 100-QFP

HD64F2145BTE20

Manufacturer Part Number
HD64F2145BTE20
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2145BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
This LSI incorporates a clock pulse generator, which generates the system clock ( ), bus master
clock, and internal clock.
The clock pulse generator consists of an oscillator, duty correction circuit, clock select circuit,
medium-speed clock divider, bus master clock select circuit, subclock input circuit, and waveform
forming circuit. Figure 24.1 shows a block diagram of the clock pulse generator.
The bus master clock is selected as either high-speed mode or medium-speed mode by software
according to the settings of the SCK2 to SCK0 bits in the standby control register. For details on
the standby control register, refer to section 26.1.1, Standby Control Register (SBYCR).
The subclock input is controlled by software according to the EXCLE bit setting in the low power
control register. For details on the low power control register, refer to section 26.1.2, Low-Power
Control Register (LPWRCR).
EXTAL
XTAL
EXCL
input circuit
Subclock
Oscillator
Figure 24.1 Block Diagram of Clock Pulse Generator
Section 24 Clock Pulse Generator
Waveform
correction
forming
circuit
circuit
Duty
count clock
WDT_1
SUB
Clock select
circuit
System clock
to
pin
Rev. 3.00 Mar 21, 2006 page 633 of 788
speed clock
Medium-
divider
Section 24 Clock Pulse Generator
Internal clock
to peripheral
modules
to /32
/2
clock select
Bus master
circuit
REJ09B0300-0300
Bus master clock
to CPU and DTC

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