HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 683

• Manufacturer Part Number: HD64F2145BTE20
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2145BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Notes: 1. Prewriting (writing 0 to all data in erased block) is not necessary.
2. The values of x, y, z, , ,
3. Verify data is read in 16-bit (word) units.
4. Set only a single bit in EBR1 and EBR2. Do not set more than one bit.
5. Erasing is performed in block units. To erase multiple blocks, each block must be erased in turn.
Increment
address
Figure 23.12 Erase/Erase-Verify Flowchart
NG
NG
H'FF dummy write to verify address
, , , and N are shown in sections 28.1.6 and 28.2.6, Flash Memory Characteristics.
Clear ESU bit in FLMCR2
Clear SWE bit in FLMCR1
*
Set SWE bit in FLMCR1
Set ESU bit in FLMCR2
Set block start address
All erase blocks erased?
Clear EV bit in FLMCR1
Clear E bit in FLMCR1
Set EV bit in FLMCR1
5
Set EBR1 and EBR2
Set E bit in FLMCR1
as verify address
Read verify data
End of erasing
Disable WDT
Enable WDT
Last address
Wait ( z ) ms
Wait ( ) s
Wait ( x ) s
Wait ( y ) s
Wait ( ) s
Wait ( ) s
Wait ( ) s
Wait ( ) s
Verify data
Wait ( ) s
= all "1"?
of block?
START
n = 1
OK
OK
OK
*
1
NG
*
*
2
2
*
*
*
Start of erasing
*
End of erasing
*
*
*
*
*
2
4
2
2
2
2
2
2
3
Rev. 3.00 Mar 21, 2006 page 627 of 788
Clear SWE bit in FLMCR1
Clear EV bit in FLMCR1
Wait ( ) s
Wait ( ) s
Erase failure
n ( N ) ?
OK
*
2
NG
*
*
n
REJ09B0300-0300
2
2
Section 23 ROM
n + 1