HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 595

IC H8S MCU FLASH 256K 100-QFP

HD64F2145BTE20

Manufacturer Part Number
HD64F2145BTE20
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2145BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Bit
4
3
2
Bit Name Initial Value Slave Host Description
LRSTB
SDWNB
PMEB
0
0
0
R/W
R/W
R/W
LPC Software Reset Bit
Resets the host interface. For the scope of
initialization by an LPC reset, see section 19.4.4,
Host Interface Shutdown Function (LPCPD).
0: Normal state
[Clearing conditions]
1: LPC software reset state
[Setting condition]
Writing 1 after reading LRSTB = 0
LPC Software Shutdown Bit
Controls host interface shutdown. For details of the
LPC shutdown function, and the scope of
initialization by an LPC reset and an LPC shutdown,
see section 19.4.4, Host Interface Shutdown
Function (LPCPD).
0: Normal state
[Clearing conditions]
1: LPC software shutdown state
[Setting condition]
Writing 1 after reading SDWNB = 0
PME Output Bit
Controls PME output in combination with the PMEE
bit. For details, refer to description on the PMEE bit
in HICR0.
Writing 0
LPC hardware reset
Writing 0
LPC hardware reset or LPC software reset
LPC hardware shutdown
LPC hardware shutdown release
(rising edge of LPCPD signal when SDWNE = 0)
Section 19 Host Interface LPC Interface (LPC)
Rev. 3.00 Mar 21, 2006 page 539 of 788
REJ09B0300-0300

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