HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 494

IC H8S MCU FLASH 256K 100-QFP

HD64F2145BTE20

Manufacturer Part Number
HD64F2145BTE20
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of HD64F2145BTE20

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Section 16 I
16.3.8
ICXR enables or disables the I
operation, and indicates the status of receive/transmit operations.
Bit Bit Name
7
6
Rev. 3.00 Mar 21, 2006 page 438 of 788
REJ09B0300-0300
STOPIM
HNDS
I
2
C Bus Extended Control Register (ICXR)
2
C Bus Interface (IIC) (Optional)
Initial Value R/W
0
0
2
C bus interface interrupt generation and continuous receive
R/W
R/W
Description
Stop Condition Interrupt Source Mask
Enables or disables the interrupt generation when the stop
condition is detected in slave mode.
0: Enables IRIC flag setting and interrupt generation when
1: Disables IRIC flag setting and interrupt generation when
Handshake Receive Operation Select
Enables or disables continuous receive operation in receive
mode.
0: Enables continuous receive operation
1: Disables continuous receive operation
When the HNDS bit is cleared to 0, receive operation is
performed continuously after data has been received
successfully while ICDRF flag is 0.
When the HNDS bit is set to 1, SCL is fixed to the low level
and the next data transfer is disabled after data has been
received successfully while the ICDRF flag is 0. The bus
line is released and next receive operation is enabled by
reading the receive data in ICDR.
the stop condition is detected (STOP = 1 or ESTP = 1) in
slave mode.
the stop condition is detected.

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