R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 331

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Figure 9.16 shows examples when the extended repeat area function is used in block transfer
mode.
9.5.6
The source and destination addresses are updated by fixing, increment/decrement by 1, 2, or 4, or
offset addition. When the offset addition is selected, the offset specified by the offset register
(DOFR) is added to the address every time the DMAC transfers the data access size of data. This
function realizes a data transfer where addresses are allocated to separated areas.
Figure 9.17 shows the address update method.
Figure 9.16 Example of Extended Repeat Area Function in Block Transfer Mode
When the are represented by the lower three bits (eight bytes) of DSAR are specified as the extended
repeat area (SARA4 to SARA0 = 3) and the block size in block transfer mode is specified to 5 (bits 23
to 16 in DTCR = 5).
Address Update Function using Offset
External memory
H'23FFFE
H'23FFFF
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
H'240008
H'240009
Area specified
by DSAR
H'240000
H'240001
H'240002
H'240003
H'240004
H'240005
H'240006
H'240007
H'240000
H'240001
H'240002
H'240003
H'240004
1st block
transfer
H'240000
H'240001
H'240005
H'240006
H'240007
2nd block
transfer
Rev. 2.00 Sep. 16, 2009 Page 301 of 1036
Section 9 DMA Controller (DMAC)
Block transfer
continued
Interrupt
request
generated
REJ09B0414-0200