R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 768

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 18 A/D Converter
18.7.7
If the conditions shown below are not met, the reliability of the LSI may be adversely affected.
• Analog input voltage range
• Relation between AVcc, AVss and Vcc, Vss
• Vref setting range
18.7.8
In board design, digital circuitry and analog circuitry should be as mutually isolated as possible,
and layout in which digital circuit signal lines and analog circuit signal lines cross or are in close
proximity should be avoided as far as possible. Failure to do so may result in incorrect operation
of the analog circuitry due to inductance, adversely affecting A/D conversion values.
Digital circuitry must be isolated from the analog input pins (AN0 to AN7), analog reference
power supply (Vref), and analog power supply (AVcc) by the analog ground (AVss). Also, the
analog ground (AVss) should be connected at one point to a stable ground (Vss) on the board.
18.7.9
A protection circuit connected to prevent damage due to an abnormal voltage such as an excessive
surge at the analog input pins (AN0 to AN7) should be connected between AVcc and AVss as
shown in figure 18.13. Also, the bypass capacitors connected to AVcc and the filter capacitor
connected to the AN0 to AN7 pins must be connected to AVss.
If a filter capacitor is connected, the input currents at the AN0 to AN7 pins are averaged, and so an
error may arise. Also, when A/D conversion is performed frequently, as in scan mode, if the
current charged and discharged by the capacitance of the sample-and-hold circuit in the A/D
converter exceeds the current input via the input impedance (R
input pin voltage. Careful consideration is therefore required when deciding the circuit constants.
Rev. 2.00 Sep. 16, 2009 Page 738 of 1036
REJ09B0414-0200
The voltage applied to analog input pin ANn during A/D conversion should be in the range
AVss ≤ V
As the relationship between AVcc, AVss and Vcc, Vss, set AVcc = Vcc ± 0.3 V and AVss =
Vss. If the A/D converter is not used, set AVcc = Vcc and AVss = Vss.
The reference voltage at the Vref pin should be set in the range Vref ≤ AVcc.
Setting Range of Analog Power Supply and Other Pins
Notes on Board Design
Notes on Countermeasure against Noise
AN
≤ Vref.
in
), an error will arise in the analog