R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 933

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 24 Power-Down Modes
24.6
All-Module-Clock-Stop Mode
When the ACSE bit is set to 1 and all modules controlled by MSTPCRA and MSTPCRB are
stopped (MSTPCRA, MSTPCRB = H'FFFFFFFF), or all modules except for the 8-bit timer (units
0 and 1) are stopped (MSTPCRA, MSTPCRB = H'F[C to F]FFFFFF), executing a SLEEP
instruction with the SSBY bit in SBYCR cleared to 0 will cause all modules (except for the 8-bit
timer* and watchdog timer), the bus controller, and the I/O ports to stop operating, and to make a
transition to all-module-clock-stop mode at the end of the bus cycle.
When power consumption should be reduced ever more in all-module-clock-stop mode, stop
modules controlled by MSTPCRC (MSTPCRC[15:8] = H'FFFF).
All-module-clock-stop mode is cleared by an external interrupt (NMI or IRQ0 to IRQ15 pins),
RES pin input, or an internal interrupt (8-bit timer* or watchdog timer), and the CPU returns to the
normal program execution state via the exception handling state. All-module-clock-stop mode is
not cleared if interrupts are disabled, if interrupts other than NMI are masked on the CPU side, or
if the relevant interrupt is designated as a DTC activation source.
When the STBY pin is driven low, a transition is made to hardware standby mode.
Note: * Operation or halting of the 8-bit timer can be selected by bits MSTPA11 to MSTPA8
in MSTPCRA.
Rev. 2.00 Sep. 16, 2009 Page 903 of 1036
REJ09B0414-0200

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