R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 831

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
(3)
FPEFEQ sets the operating frequency of the CPU. The operating frequency available in this LSI
ranges from 8 MHz to 50 MHz.
Bit
31 to 16 
15 to 0
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Bit
Bit Name
Flash Program/Erase Frequency Parameter (FPEFEQ: General Register ER0 of CPU)
Bit Name
F15 to F0 
F15
31
23
15
F7
7
Initial
Value
F14
F6
30
22
14
6
R/W
R/W
F13
29
21
13
F5
5
Description
Unused
These bits should be cleared to 0.
Frequency Set
These bits set the operating frequency of the CPU.
When the PLL multiplication function is used, set the
multiplied frequency. The setting value must be
calculated as follows:
1. The operating frequency shown in MHz units must be
2. The value multiplied by 100 is converted to the binary
For example, when the operating frequency of the CPU
is 35.000 MHz, the value is as follows:
1. The number of three decimal places of 35.000 is
2. The formula of 35.00 × 100 = 3500 is converted to the
rounded in a number of three decimal places and be
shown in a number of two decimal places.
digit and is written to FPEFEQ (general register ER0).
rounded.
binary digit and B'0000 1101 1010 1100 (H'0DAC) is
set to ER0.
F12
28
20
12
F4
4
F11
F3
27
19
11
3
Rev. 2.00 Sep. 16, 2009 Page 801 of 1036
F10
F2
26
18
10
2
Section 22 Flash Memory
F9
F1
25
17
9
1
REJ09B0414-0200
24
16
F8
F0
8
0

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