R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 904

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 23 Clock Pulse Generator
DSADMR sets the control for the bias circuit and the clock selection for the ∆Σ A/D converter.
Read operations are always enabled, but write operations should be performed when the ∆Σ A/D
module is stopped.
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Rev. 2.00 Sep. 16, 2009 Page 874 of 1036
REJ09B0414-0200
Bit
7
6 to 3
2
1
0
23.1.2
Bit
Bit Name
Initial Value
R/W
Don't care
Bit Name
BIASE

ACK2
ACK1
ACK0
∆Σ A/D Mode Register (DSADMR)
BIASE
R/W
7
0
Initial
Value
0
All 0
0
0
0

R
6
0
R/W
R/W
R
R/W
R/W
R/W

R
5
0
Description
Bias Circuit Control
Sets whether the bias circuit is to be operated or
stopped.
0: Stops the bias circuit.
1: Operates the bias circuit.
Reserved
These bits are always read as 0. The write value should
always be 0.
∆Σ A/D Converter Frequency Division Clock Select
These bits select the frequency of the ∆Σ A/D clock (Aφ).
The ratio to the input clock is as follows. In setting, the
value of Aφ should be in the neighborhood of 25 MHz.
000: × 1/6
001: × 1/5
010: × 1/4
011: × 1/3
1xx: Setting prohibited

R
4
0

R
3
0
ACK2
R/W
2
0
ACK1
R/W
1
0
ACK0
R/W
0
0