R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 602

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 14 8-Bit Timers (TMR)
• TCSR_1
Rev. 2.00 Sep. 16, 2009 Page 572 of 1036
REJ09B0414-0200
Bit
7
6
5
Bit Name
CMFB
CMFA
OVF
Initial
Value
0
0
0
R/W
R/(W)*
R/(W)*
R/(W)*
1
1
1
Description
Compare Match Flag B
[Setting condition]
[Clearing conditions]
Compare Match Flag A
[Setting condition]
[Clearing conditions]
Timer Overflow Flag
[Setting condition]
When TCNT overflows from H'FF to H'00
[Clearing condition]
Cleared by reading OVF when OVF = 1, then writing 0 to
OVF
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure to
read the flag after writing 0 to it.)
When TCNT matches TCORB
When writing 0 after reading CMFB = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
When the DTC is activated by a CMIB interrupt while
the DISEL bit in MRB of the DTC is 0*
When TCNT matches TCORA
When writing 0 after reading CMFA = 1
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure
to read the flag after writing 0 to it.)
When the DTC is activated by a CMIA interrupt while
the DISEL bit in MRB of the DTC is 0*
3
3

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