R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 797

• Manufacturer Part Number: R5F61662N50FPV
• Description: MCU 24KB FLASH 384K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61662N50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.6
19.6.1
Operation of the ∆Σ A/D converter can be enabled or disabled by setting the module stop control
register. By default, the ∆Σ A/D converter is stopped. Most registers of the ∆Σ A/D converter only
become accessible when it is released from the module stop state. See section 24, Power-Down
Modes, for details.
Although DSADMR is accessible to the CPU at any time, writing to this register should only be
performed while the converter is in the module stop state.
To stop the ∆Σ A/D converter completely, place it in the module stop state and then stop the
biasing circuit by clearing the BIASE bit in DSADMR to 0.
19.6.2
When the BIASE bit in DSADMR is set to enable the biasing circuit before the ∆Σ A/D converter
is used, a certain period must be secured for stabilization of the biasing circuit. If A/D conversion
is executed without ensuring enough time for stabilization of the biasing circuit, the precision of
A/D conversion is not guaranteed.
When the biasing circuit is stopped by clearing the BIASE bit in DSADMR to 0 or on entry to the
hardware standby mode, the reset state, or deep software standby mode, a certain period for
stabilization of the biasing circuit will be required after the BIASE bit has been set to 1 again.
A certain amount of biasing current flows while the biasing circuit is running. Since the value set
in the BIASE bit is retained in software standby mode, the supply current will include the current
that flows through the biasing circuit if BIASE = 1. Be sure to set the BIASE bit appropriately
before initiating software standby mode.
Ensure at least 20 ms for stabilization of the biasing circuit.
Usage Notes
Module Stop Function Setting
Settings for the Biasing Circuit
Rev. 2.00 Sep. 16, 2009 Page 767 of 1036
Section 19 ∆Σ A/D Converter
REJ09B0414-0200