R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 791

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Figure 19.7 shows the flow of ∆Σ A/D conversion initiated by a trigger input.
Figure 19.7 Flow of ∆Σ A/D Conversion Operation (Initiated by a Trigger Input)
Yes
A/D conversion (according
to register settings);
ADF is set to 1 on completion of a round
of conversion for all selected channels
[Operation continues until ADST clearing
condition arises]
Software processing
(setting for the tirgger generating module):
Make settings to negate the trigger input
signal
Software processing:
Set ∆Σ converter registers
Set TRGS0 and TRGS1 to specify tringger
input
Software processing
(setting for the tirgger generating module):
Set conditions for trigger input generation
Software processing:
Clear TRGS0 and TRGS1 to B'00
Continue tirgger-initiated
A/D conversion?
Trigger input generated?
ADST is cleared to 0
ADST is set to 1
Start
End
Yes
No
Rev. 2.00 Sep. 16, 2009 Page 761 of 1036
No
Section 19 ∆Σ A/D Converter
REJ09B0414-0200

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