R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 938

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 24 Power-Down Modes
24.8
24.8.1
If a SLEEP instruction is executed when the SSBY bit in SBYCR has been set to 1, a transition to
software standby mode is made. In this state, if the DPSBY bit in DPSBYCR is set to 1, a
transition to deep software standby mode is made.
If a software standby mode clearing source (an NMI, or IRQ0 to IRQ15) occurs when a transition
to software standby mode is made, software standby mode will be cleared regardless of the
DPSBY bit setting, and the interrupt exception handling starts after the oscillation settling time for
software standby mode specified by the bits STS4 to STS0 in SBYCR has elapsed.
When both of the SSBY bit in SBYCR and the DPSBY bit in DPSBYCR are set to 1 and no
software standby mode clearing source event occurs, a transition to deep software standby mode
will be made immediately after software standby mode is entered.
In deep software standby mode, the CPU, on-chip peripheral functions, on-chip RAM, and
oscillator functionality are all halted. In addition, the internal power supply to these modules stops,
resulting in a significant reduction in power consumption. At this time, the contents of all the
registers of the CPU, on-chip peripheral functions, and on-chip RAM become undefined.
Contents of the on-chip RAM can be retained when all the bits RAMCUT2 to RAMCUT0 in
DPSBYCR have been cleared to 0. If these bits are set to all 1, the internal power supply to the on-
chip RAM stops and the power consumption is further reduced. At this time, the contents of the
on-chip RAM become undefined.
The I/O ports can be retained in the same state as in software standby mode.
Rev. 2.00 Sep. 16, 2009 Page 908 of 1036
REJ09B0414-0200
Deep Software Standby Mode
Entry to Deep Software Standby Mode

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