R5F61662N50FPV Renesas Electronics America, R5F61662N50FPV Datasheet - Page 35

MCU 24KB FLASH 384K 144-LQFP

R5F61662N50FPV

Manufacturer Part Number
R5F61662N50FPV
Description
MCU 24KB FLASH 384K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61662N50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61662N50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Classification
Clock
A/D converter
Module/
Function
Clock pulse
generator
(CPG)
10-bit A/D
converter
(ADC)
16-bit
∆Σ A/D
converter
(∆Σ AD)
Description
One clock generation circuit available
Separate clock signals are provided for each of functional
modules (detailed below) and each is independently specifiable
(multi-clock function)
 System-intended data transfer modules, i.e. the CPU, are
 On-chip peripheral functions are run by the peripheral
 External space modules are supplied with the external bus
 ∆Σ A/D converter is run by the clock for ∆Σ A/D converter
Includes a PLL frequency multiplier and frequency dividers
(including a divider for Aφ), so the operating frequency is
selectable
Five power-down modes: Sleep mode, all-module-clock-stop
mode, software standby mode, deep software standby mode,
and hardware standby mode
10-bit resolution × eight input channels
Sample and hold function included
Conversion time: 5.33 µs per channel (with ADCLK at 7.5 MHz
operation)
Two operating modes: single mode and scan mode
Three ways to start A/D conversion: by software, timer
(TPU/TMR) trigger, and external trigger
(Starting by TPU/TMR: This operation is available on the on-chip
emulator but not available on other emulators.)
16-bit resolution
Six input channels (differential inputs on two channels)
Conversion time: 286 states
Two operating modes: single mode and scan mode
∆Σ modulation
Three ways to start A/D conversion: by software, timer
(TPU/TMR) trigger, and external trigger
(Starting by TPU/TMR: This operation is available on the on-chip
emulator but not available on other emulators.)
Input voltage offset cancellation in two modes: by register setting
and by differential input
run by the system clock (Iφ): 8 to 50 MHz
module clock (Pφ): 8 to 35 MHz
clock (Bφ): 8 to 50 MHz
(Aφ): near 25 MHz
Rev. 2.00 Sep. 16, 2009 Page 5 of 1036
Section 1 Overview
REJ09B0414-0200

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