IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 142

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Target Mode Operation
Figure 3–16. Zero-Wait State Burst Memory Write Target Transaction
Note to
(1)
3–68
PCI Compiler User Guide
(1) l_dato[63..32]
(1) l_hdat_ackn
(1) l_beno[7..4]
(1) l_ldat_ackn
(1) ad[63..32]
(1) cben[7..4]
l_adro[31..0]
l_cmdo[3..0]
l_dato[31..0]
l_beno[3..0]
lt_tsr[11..0]
(1) ack64n
(1) req64n
cben[3..0]
lt_framen
(1) par64
ad[31..0]
This signal is not applicable to the pci_mt32 or pci_t32 MegaCore functions.
devseln
lt_dxfrn
lt_ackn
framen
lt_rdyn
stopn
irdyn
trdyn
par
clk
Figure
1
3–16:
2
000
Adr
7
3
Adr-PAR
4
BE0_H
BE0_L
D0_H
D0_L
PCI Compiler Version 10.1
5
381
D0-H-PAR
D0-L-PAR
6
7
BE0_H
BE0_L
BE1_H
BE1_L
D1_H
D0_H
D1_L
D0_L
Adr
7
8
D1-H-PAR
D1-L-PAR
BE2_H
BE1_H
D2_H
BE2_L
D1_H
BE1_L
D2_L
D1_L
9
D2-H-PAR
D2-L-PAR
BE3_H
BE2_H
BE3_L
BE2_L
D3_L
D3_H
D2_L
D2_H
781
10
D3-H-PAR
D3-L-PAR
BE4_H
BE3_H
BE4_L
BE3_L
D4_H
D3_H
D4_L
D3_L
11
D4-H-PAR
D4-L-PAR
BE4_L
BE4_H
D4_H
D4_L
Altera Corporation
12
January 2011
13
000
14