IPR-PCI/MT32 Altera, IPR-PCI/MT32 Datasheet - Page 56

• Manufacturer Part Number: IPR-PCI/MT32
• Description: IP CORE Renewal Of IP-PCI/MT32
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IPR-PCI/MT32

• Software Application: IP CORE, Interface And Protocols, PCI
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: PCI Compiler, Master/Target, 32 bit
• License: Renewal License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Using the Reference Designs
1–22
PCI Compiler User Guide
where <path> is the directory in which you installed the PCI Compiler.
synthesis & Compilation Instructions
To compile the pci_mt64 MegaCore Function Reference Design in the
Quartus II software, follow these steps:
1.
2.
chip_top
pci_top
pci_local
sdr_intf
sdr_cntrl
Table 1–7. Directory Structure of pci_mt64 MegaCore Reference Design
Directory Name
<path>/pci_compiler/megawizard_flow
/ref_designs/pci_mt64/vhdl
Create a new project in the Quartus II software, specifying the top-
level design file as follows:
<path>/pci_compilerv/megawizard_flow
/ref_designs/pci_mt64/vhdl/chip_top.vhd
Add the following directories as user libraries in the Quartus II
software:
<path>/pci_compiler/lib
<path>/pci_compiler/megawizard_flow
/ref_designs/pci_mt64/vhdl/chip_top
PCI Compiler Version 10.1
instantiates the following modules:
●
●
●
●
This directory contains a pci_mt64 MegaCore function top-
level wrapper file. This wrapper file was generated using IP
Toolbench with the following parameters selected using the
Parameterize - PCI Compiler Wizard:
●
●
This directory contains local interface logic files. For more
information on these files, refer to FS 10: pci_mt64
MegaCore Function Reference Design.
This directory contains files for the interface logic between
the PCI local interface logic and the SDR SDRAM controller.
This directory contains a top-level design file that
This directory contains files for the SDR SDRAM controller.
pci_mt64 MegaCore function variation file
Local interface logic
SDR SDRAM interface
SDR SDRAM controller
BAR0 reserves 1MB of memory space
BAR1 reserves 32MB of memory space
Description
Altera Corporation
January 2011