MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 106

• Manufacturer Part Number: MPCBL0050N02Q
• Manufacturer: Intel

Specifications of MPCBL0050N02Q

• Lead Free Status / RoHS Status: Supplier Unconfirmed

5.4.5
Intel NetStructure
Technical Product Specification
106
®
MPCBL0050 FRU Record
On the MPCBL0050 SBC, the FRU information pertaining to the board has been
structured as below per the Platform Management FRU Information Storage Definition
v1 specification.
The “Common”, “Board”, and “Product” fields are used by Intel during manufacturing
and are used to program all the relevant board information into the FRU.
The “MULTIREC” is an Intel multi-record area allocated for use by the EFI BIOS to
program the relevant version information to the FRU during power up.
The following FRU record is an illustration of typical FRU information for the MPCBL0050
and is subject to change. Please refer to the MPCBL0050 IPMC release package for the
latest FRU file.
_LF_NAME
_LF_VERSION
_LF_FMT_VER
_IPMI_VERSION
_FRU (
_FRU_TITLE
_START_ADDR
_DATA_LEN
_NVS_TYPE
_DEV_ADDRESS
_SEE_COMMON
_SEE_BOARD
MPCBL0050 Single Board Computer
00
00
12
27
01
01
00
C5
'MPCBL0050_101.fru' // Name for this load file
'1.01'
'1.50'// Version of the load file format
'1.00'// IPMI format version (FRU spec version)
'CPU Board' // FRU Title
8000
03A7
'IMBDEVICE' // Non-volatile Storage Type
20
// Internal Use Area Starting Offset (in multiples of 8 bytes)
// Chassis Info Area Starting Offset (in multiples of 8 bytes)
// Product Info Area Starting Offset (in multiples of 8 bytes)
// MultiRecord Area Starting Offset (in multiples of 8 bytes)
// Common Header Format Version
// Board Info Area Starting Offset (in multiples of 8 bytes)
// Pad
// Common Header Checksum
// Start Address
// Data Length
// Device Address
// Version of this load file
MPCBL0050—Hardware Management
Order Number: 318146-001
September 2007