MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 9

no-image

MPCBL0050N02Q

Manufacturer Part Number
MPCBL0050N02Q
Description
Manufacturer
Intel
Datasheet

Specifications of MPCBL0050N02Q

Lead Free Status / RoHS Status
Supplier Unconfirmed
—MPCBL0050
September 2007
Order Number: 318146-001
A
B
Figures
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
16.3
16.4
Supported IPMI Commands ............................................................... 251
Reference Documents ........................................................................ 257
MPCBL0050 SBC block diagram .............................................................. 18
MPRTM0040 RTM block diagram ............................................................. 19
MPRTM0050 RTM block diagram ............................................................. 20
Fully Buffered DIMM channels ................................................................ 23
Gigabit Ethernet interface block diagram ................................................. 25
Four GbE ports directed to the backplane (PICMG 3.1 Option 2) ................. 26
Two GbE ports directed to backplane, two GbE ports to front panel ............. 26
Four GbE ports directed to RTM, AMC GbE port connected to backplane ....... 27
Power conversion diagram..................................................................... 31
Front panel connectors.......................................................................... 35
USB connector ..................................................................................... 36
Serial port connector (J4)...................................................................... 36
DB-9 to RJ-45 pin translation................................................................. 37
Gigabit Ethernet connector .................................................................... 38
Front panel LEDs.................................................................................. 39
Backplane and on-board connector/DIP switch locations ............................ 41
AdvancedMC connector ......................................................................... 48
Power distribution connector (Zone 1) P10 .............................................. 49
Data transport connector J20 (Zone 2).................................................... 51
Data transport connector J23 (Zone 2).................................................... 52
J30 connector ...................................................................................... 54
AdvancedMC filler panel ........................................................................ 60
Top cover screw locations...................................................................... 61
Latches left in the closed (correct) position .............................................. 62
Digital ground to chassis ground standoff location .................................... 63
MAC address label on MPCBL0050 board ................................................. 67
IPMC Block Diagram ............................................................................. 70
On-board temperature sensor locations................................................. 100
Fabric interface Ethernet routing .......................................................... 117
IPMC flash hHigh-level block diagram.................................................... 119
Payload reset state diagram ................................................................ 123
Watchdog timers................................................................................ 125
Flow diagram for graceful reboot command ........................................... 127
Diagnostic interrupt command implementation....................................... 128
Boot sequence ................................................................................... 145
SOL block diagram ............................................................................. 164
Reference script running on remote node, communicating over LAN .......... 167
EFI BIOS configuration of SOL target blade............................................ 171
Configuration for RHEL........................................................................ 172
Creating a new project workspace ........................................................ 185
Selecting a boot device ....................................................................... 185
Selecting a COM port .......................................................................... 186
Query device ..................................................................................... 186
Changing CPU crystal frequency ........................................................... 187
KCS - local communication from CPU to local IPMC ................................. 193
KCS bridge - local communication from CPU to local IPMC bridged to RTM . 193
EFI BIOS welcome screen................................................................... 147
Sales Assistance.......................................................................... 250
Product Code Summary................................................................ 250
Intel NetStructure
®
MPCBL0050 Single Board Computer
Technical Product Specification
9