MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 83

• Manufacturer Part Number: MPCBL0050N02Q
• Manufacturer: Intel

Specifications of MPCBL0050N02Q

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Hardware Management—MPCBL0050
Table 28.
September 2007
Order Number: 318146-001
Sensor Name
SMI Timeout
Forced Reset
Forced NMI
SMI State
IPMC hardware sensor and events (Sheet 10 of 18)
85h
86h
87h
88h
Sens
No.
or
OEM
C0h
OEM
C0h
OEM
C0h
OEM
C0h
Sensor
Type
Digital
Discrete
03h
Digital
Discrete
03h
Digital
Discrete
03h
Digital
Discrete
03h
Reading
Event /
Type
00h
01h
01h
01h
00h
01h
Offset
Event
[3:0]
ED1
Technical Product Specification
FFh
Reset type:
00h - Hard
reset
01h - Soft
Reset
(Keyboard)
NMI Cause
FFh
Byte
2
Event Data
83
FFh
Reset Cause
See:
FFh
FFh
Byte
Table
3
+
State Deasserted
State Asserted
SMI has been asserted for
more than 90 seconds. It
means that BIOS/OS did not
handle SMI interrupt.
State Asserted - Reset signal
state has been asserted and
deasserted by IPMC
Note: this sensor does not
reflect state of reset signal.
Events are logged only when
IPMC asserts this signal.
This is event-only sensor.
State Asserted - NMI signal
state has been asserted and
deasserted by IPMC
Note: This sensor does not
reflect state of CPU NMI
input. Events are logged only
when IPMC asserts CPU NMI
signal.
This is event-only sensor.
State Deasserted
State Asserted
Event
Intel NetStructure
As & De
®
Events
Assert
As &De
assert
/ De-
MPCBL0050 Single Board Computer
As
As
–
-
-
Readab
Value /
–
Offsets
le
A
A
A
A
–
-
-
-
N/A
N/A
N/A
N/A