MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 22

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MPCBL0050N02Q

Manufacturer Part Number
MPCBL0050N02Q
Description
Manufacturer
Intel
Datasheet

Specifications of MPCBL0050N02Q

Lead Free Status / RoHS Status
Supplier Unconfirmed
Table 2.
2.2.3.2
2.2.3.3
Intel NetStructure
Technical Product Specification
22
®
The MCH provides four channels of Fully Buffered DIMM (FB-DIMM) memory. Each
channel can support up to 4 Dual Ranked FB-DIMM DDR2 DIMMs. FB-DIMM memory
channels are organized into two branches for support of RAID 1 (mirroring). On the
MPCBL0050, the maximum theoretical bandwidth between MCH and FB-DIMMs is 1GB/
s per channel for DDR2 533 FB-DIMMs. With four FB-DIMM slots available, each
connected to a separate channel, the total bandwidth available is 4GB/s.
The Intel
The MCH provides six x4 PCI Express interfaces which can be combined to three x8
ports. The MCH is a root class component as defined in the PCI Express Interface
Specification, Rev1.0a.
The MCH interfaces with the Intel® 6321ESB ICH via a dedicated Enterprise South
Bridge Interface (ESI) port together with x8 PCI Express port, providing appropriate
bandwidth for I/O interfaces connected to to the ICH.
PCI Express port mapping
Intel
The Intel
PCI Express, PCI-X, conventional PCI, LPC, USB, SATA, IDE and SMBus, and dual-Gigabit
Ethernet MAC components, as well as numerous board management functions. It
provides for all system I/O, allowing for simpler system board architectures and smaller
board areas than if discrete components were used.
The 6321ESB integrates an Ultra ATA 100 controller, six Serial ATA host controller ports,
one EHCI host controller, and four UHCI host controllers supporting eight external USB
2.0 ports, LPC interface controller, and flash.
The 6321ESB component provides the data buffering and interface arbitration required
to ensure that system interfaces operate efficiently and provide the bandwidth
necessary to enable the system to obtain peak performance.
The 6321ESB also contains two fully integrated Gigabit Ethernet Media Access Control
(MAC). This provides a standard IEEE 802.3 Ethernet interface for 1000BASE-T,
1000BASE-X, 100BASE-TX, and 10BASE-T applications. Each port contains a Kumeran
interface for connecting the ICH to the Intel® 82563EB 2x PHY Device.
Intel
The Intel® 82571EB Gigabit Ethernet Controller is a single, compact component with
two fully integrated Gigabit Ethernet Media Access Control (MAC) and physical layer
(PHY) ports. This device uses the PCI Express* architecture (Rev. 1.0a). The 82571EB
provides two IEEE 802.3* Ethernet interfaces for 1000BASE-T, 100BASE-TX, and
10BASE-T applications. Both ports also integrate a Serializer-Deserializer (SerDes) to
support Gigabit backplane applications. In addition to managing MAC and PHY Ethernet
layer functions, the controller manages PCI Express packet traffic across its
transaction, link, and physical/logical layers.
Port 2,3
Port 6,7
MPCBL0050 Single Board Computer
Port 0
Port 4
Port 5
(ESI)
Port
®
®
6321ESB I/O Controller Hub
82571EB Gigabit Ethernet Controller
®
®
Enterprise South Bridge Interface (ESI) connects to Intel
Connects to Intel
Connects to Fabric Interface (Port 0, Channel 1 & 2) Gigabit Ethernet Controller 82571
Connects to Fabric Interface (Port 1, Channel 1 & 2) Gigabit Ethernet Controller 82571
Connects to AdvancedMC slot B2
5000P is compatible with the PCI Express* Interface Specification, Rev 1.0a.
6321ESB I/O Controller Hub component integrates bridge functionality for
®
6321ESB ICH
Function
®
6321ESB ICH
MPCBL0050—Feature Overview
Order Number: 318146-001
September 2007