MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 94

• Manufacturer Part Number: MPCBL0050N02Q
• Manufacturer: Intel

Specifications of MPCBL0050N02Q

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Table 33.
5.2.4
Intel NetStructure
Technical Product Specification
94
®
Reset causes
NMI Sensor/NMI Assertion from IPMC
The IPMC generates an NMI pulse under certain conditions. The IPMC-generated NMI
pulse duration is at least 30 ms. Once an NMI has been generated by the IPMC, the
IPMC will not generate another until the system has been reset or powered down
except that enabling NMI via an NMI Enable/Disable command will re-arm the NMI.
The IPMC captures the NMI source(s) and makes that information available via a Get
NMI Source command. Reading the NMI source information causes it to be cleared. The
Set NMI Source command is available to other agents (e.g., BIOS SMI Handler) to
register NMI sources when they detect NMI generating errors. OS NMI handlers that
save system crash state can use the Get NMI Source command to determine and save
the cause of the NMI.
IPMC NMI generation can be disabled by the NMI Enable/Disable command. The default
state is enabled and the enabled/disabled state is volatile (not saved across AC power
cycles).
The following may cause the IPMC to generate an NMI/INIT pulse:
Value
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
• Receiving a Chassis Control command to pulse the Diagnostic Interrupt.
• A PEF table entry matching an event where the filter entry has the Diagnostic
• Watchdog timer pre-timeout expiration with NMI/Diagnostic Interrupt pre-timeout
MPCBL0050 Single Board Computer
Interrupt action indicated.
action enabled.
Reset reason/cause
Reserved
Button
Reset has been forced by the IPMC in response to front panel reset button.
CPU
Reset has been forced by the IPMC in response to “Set Processor Status” command.
FRB
Reset has been forced by the IPMC in FRB3 action failure.
IPMI Watchdog
Reset has been forced by the IPMC on expiration of IPMI watchdog When IPMI watchdog timer
use flag is configured to hard reset.
IPMI command
Reset has been forced by the IPMC in response to one of following IPMI commands:
- “Chassis Control” with action “Hard Reset”
- PICMG “FRU control” with action “Hard Reset” or “Warm Reset”
- “Reset BIOS Flash Type” – after BIOS firmware hub switching
PEF filter action
Reserved
Reserved
Reserved
IERR
Reset has been forced by the IPMC in response to IERR detection. This reset occurs when IERR
action is configured to “Reset”.
MPCBL0050—Hardware Management
Order Number: 318146-001
September 2007