MPCBL0050N02Q Intel, MPCBL0050N02Q Datasheet - Page 127

• Manufacturer Part Number: MPCBL0050N02Q
• Manufacturer: Intel

Specifications of MPCBL0050N02Q

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Hardware Management—MPCBL0050
5.15.1
5.15.2
5.15.3
Figure 33.
Table 44.
September 2007
Order Number: 318146-001
Cold Reset
When this command is initiated, the board performs a hard reset as described in
Section
Warm Reset
When this command is initiated, the board performs a soft reset as described in
Section
Graceful Reboot
This specific payload control command is implemented using the system interface
messaging capability and the SMS_ATN bit of the KCS Status registers.
The Receive Message Queue is used to hold message data for system software until the
system software can collect it, while the SMS_ATN bit is used to indicate that the IPMC
requires attention from the system software.
The flow diagram shown in
software to interact with this command.
Flow diagram for graceful reboot command
Returned values from the Get Message command (Sheet 1 of 2)
Byte
1
2
1. The MM sends a frucontrol=2 command to the IPMC, initiating a graceful reboot.
2. When the IPMC receives frucontrol=2, it formats a message into the send message
3. The OS agent polls for SMS_ATN using the Get Message Flags command.
4. The OS agent sends a Get Message command to the IPMC to retrieve the message
queue and sets the SMS attention flag (SMS_ATN) on the KCS status register.
from the receive message queue. The Get Message command returns the data in
Table
5.12.
5.12.
Data
Completion Code
Channel
44.
O S A g e n t
A s s e r ts S M S _ A T N s ig n a l
G e t M e s s a g e
K C S I n te r f a c e
Figure 33
Value
00h
40h
3
4
will assist users that are developing their system
Comments
Administrator privilege, Channel 0 (IPMB 0)
Intel NetStructure
I P M C
2
C m m s e t – l b la d e x – d f r u c o n tr o l – v 2
®
MPCBL0050 Single Board Computer
I P M B I n te r f a c e
Technical Product Specification
C
127