M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 102

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP-BL#U5

Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
NSC
Quantity:
78
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
9. Protection
e
E
3
. v
J
2
Figure 9.1 PRCR Register
0
C
The protection function protects important registers from being easily overwritten when a program runs out of
control.
Figure 9.1 shows the PRCR register. Each bit in the PRCR register protects the following registers:
The PRC2 bit is set to "0" (write disabled) when data is written to a desired address after setting the PRC2
bit to "1" (write enabled). Set the PD9 and PS3 registers immediately after setting the PRC2 bit in the
PRCR register to "1" (write enabled). Do not generate an interrupt or a DMA transfer between the instruc-
tion to set to the PRC2 bit to "1" and the following instruction. The PRC1 and PRC0 bits are not set to "0"
even if data is written to desired addresses. Set the PRC1 and PRC0 bits to "0" by program.
1
9
0 .
8 /
B
• The PRC0 bit protects the CM0, CM1, CM2, MCD, PLC0 and PLC1 registers;
• The PRC1 bit protects the PM0, PM1, PM2, INVC0 and INVC1 registers;
• The PRC2 bit protects the PD9 and PS3 registers;
0
0
0
2
7
G
N
1
o
o r
0 -
Protect Register
. v
b7
u
1
NOTE:
0
p
0
b6
, 1
0
1. The PRC2 bit is set to "0" by writing into a desired address after the PRC2 bit is set to "1".
2
The PRC1 and PRC0 bits are not automatically set to "0". Set them to "0" by program.
b5
0
0
b4
5
b3
Page 81
b2
b1
b0
f o
(b7 - b4)
3
Symbol
PRC0
PRC1
PRC2
3
(b3)
Bit
0
Symbol
PRCR
Protect Bit 0
Protect Bit 1
Protect Bit 2
Reserved Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
Bit Name
Address
000A
(1)
16
Enables writing to CM0, CM1, CM2,
MCD, PLC0, PLC1 registers
0: Write disabled
1: Write enabled
Enables writing to PM0, PM1, PM2,
INVC0, INVC1 registers
0: Write disabled
1: Write enabled
Enables writing to PD9, PS3 registers
0: Write disabled
1: Write enabled
Set to "0"
After Reset
XXXX 0000
Function
2
RW
RW
RW
RW
RW
9. Protection

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