M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 68

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP-BL#U5

Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
NSC
Quantity:
78
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
3
. v
J
2
Figure 7.4 Bus Cycle with Separate Bus (1)
0
C
1
9
• Bus Cycle 1 + 3
• Bus Cycle 1 + 5
8 /
• Bus Cycle 1 + 1
0 .
B
WR, WRL, WRH
WR, WRL, WRH
WR, WRL, WRH
0
i=0 to 3
NOTE:
0
0
2
G
7
N
Data (Read)
Data (Write)
Data (Read)
1. When the microcomputer continuously accesses the same CS area, the CSi pin outputs an "L" signal continuously.
Data (Write)
Data (Read)
1
Data (Write)
o r
o
0 -
Address
. v
Address
BCLK
u
Address
BCLK
1
BCLK
CS
CS
p
0
RD
CS
0
RD
RD
, 1
i
0
(1)
i
i
(1)
(1)
2
0
0
1 bus cycle = 2
5
Page 47
1 bus cycle = 4
1 bus cycle = 6
f o
3
3
0
• Bus Cycle 1 + 2
• Bus Cycle 1 + 4
• Bus Cycle 1 + 6
WR, WRL, WRH
WR, WRL, WRH
WR, WRL, WRH
Data (Read)
Data (Write)
Data (Read)
Data (Read)
Data (Write)
Data (Write)
Address
Address
Address
BCLK
BCLK
BCLK
CS
CS
CS
RD
RD
RD
i
i
i
(1)
(1)
(1)
1 bus cycle = 3
1 bus cycle = 5
1 bus cycle = 7
7. Bus

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