M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 243

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP-BL#U5

Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
NSC
Quantity:
78
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
3
. v
J
2
Figure 17.2 AD0CON0 Register
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
o
o r
0 -
A/D0 Control Register 0
. v
b7
NOTES:
u
1
p
0
0
1. When the AD0CON0 register is rewritten during the A/D conversion, the conversion result is
2. Analog input pins must be set again after changing an A/D operating mode.
3. The CH2 to CH0 bit settings are enabled in one-shot mode and repeat mode.
4. To set the TRG bit to "1", select the cause of trigger by setting the TRG0 bit in the AD0CON2 register.
5.
6. AV
7. Set the PSC_7 bit in the PSC register to "1" to use the P10 pin as an analog input pin.
b6
, 1
0
Combination of the CKS0, CKS1 and CKS2 bits selects
indeterminate.
Then set the ADST bit to "1" after the TRG bit is set to "1".
2
b5
AD
AD
0
CC
The CKS2 Bit in the
AD0CON3 Register
0
b4
frequency must be under 10 MHz when V
frequency must be under 16 MHz when V
5
=V
b3
REF
Page 222
=V
b2
0
1
CC1
b1
, AD input voltage (for AN
b0
f o
Symbol
3
ADST
CKS0
CH0
CH1
CH2
MD0
MD1
TRG
3
Bit
0
Symbol
AD0CON0
The CKS0 Bit in the
AD0CON0 Register
(1)
Analog Input Pin
Select Bit
A/D Operating Mode
Select Bit 0
Trigger Select Bit
A/D Conversion
Start Flag
Frequency Select
Bit
0
1
0
Bit Name
(2, 3, 6, 7)
0
(2)
to AN
CC1
CC1
Address
0396
=3.3V.
=5V.
The CKS1 Bit in the
AD0CON1 Register
7
, ANEX0, ANEX1)
16
b2
0 0 0: AN
0 0 1: AN
0 1 0: AN
0 1 1: AN
1 0 0: AN
1 0 1: AN
1 1 0: AN
1 1 1: AN
b4
0 0: One-shot mode
0 1: Repeat mode
1 0: Single sweep mode
1 1: Repeat sweep mode 0 or 1
0: Software trigger
1: External trigger, hardware trigger
0: A/D conversion stops
1: A/D conversion starts
(Note 5)
b1b0
b3
AD
0
1
0
1
0
1
.
0
1
2
3
4
5
6
7
After Reset
00
V
f
f
f
f
f
AD
AD
AD
AD
AD
CC1
16
Function
divided by 4
divided by 3
divided by 2
divided by 8
divided by 6
.
f
(4)
AD
AD
(4)
17. A/D Converter
RW
RW
RW
RW
RW
RW
RW
RW
RW

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