M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 173

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP-BL#U5

Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
NSC
Quantity:
78
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R
R
M
e
E
3
. v
J
2
Figure 14.21 TB0MR to TB5MR Registers
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
o
o r
0 -
Timer Bi Mode Register
. v
b7
u
NOTES:
1
0
p
0
b6
, 1
0
1. MR0 and MR1 bit settings are enabled when the TCK1 bit is set to "0". The MR1 bit can be set to
2. j=i-1, except j=2 when i=0 and j=5 when i=3.
2
either "0" or "1", when the TCK1 bit is set to "1".
b5
0
0
0
b4
5
Page 152
b3
b2
b1
0 1
b0
f o
TMOD0
TMOD1
Symbol
3
TCK0
TCK1
MR0
MR2
MR3
3
MR1
Bit
0
Symbol
TB0MR to TB5MR 035B
(i=0 to 5)
Operating Mode
Select Bit
Count Polarity Select
Bit
TB0MR and TB3MR registers:
TB1MR, TB2MR, TB4MR and TB5MR registers:
Disabled in event counter mode. When write, set to "0".
When read, its content is indeterminate.
Disabled in event counter mode.
Can be set to "0" or "1".
Event Clock
Select Bit
Set to "0" in event counter mode
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
(1)
Bit Name
(Event Counter Mode)
Address
16
, 035C
16
b3b2
, 035D
b1b0
0 0: Counts falling edges of external signal
0 1: Counts rising edges of external signal
1 0: Counts falling and rising edges of
1 1: Do not set to this value
0: Input signal from the TBi
1: TBj overflows or underflows
0 1: Event counter mode
external signal
16
, 031B
16
Function
, 031C
16
, 031D
IN
16
pin
(2)
After reset
00XX 0000
14. Timer (Timer B)
RW
RW
RW
RW
RW
RW
RW
RW
2

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