M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 119

• Manufacturer Part Number: M30800SAGP-BL#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

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2
Figure 10.9 Interrupt Priority Level Select Circuit
0
C
1
9
0 .
8 /
B
Low
High
0
0
Peripheral Function Interrupt Priority
(if priority levels are the same)
0
2
7
G
N
1
o
o r
0 -
Bus Conflict/Start, Stop Condition
Bus Conflict/Start, Stop Condition
Each Interrupt Priority Level
. v
UART0 Transmission/NACK
UART1 Transmission/NACK
u
1
UART2 Transmission/NACK
UART4 Transmission/NACK
UART3 Transmission/NACK
UART0 Reception/ACK
UART1 Reception/ACK
Bus Conflict/Start, Stop
0
0
p
UART2 Reception/ACK
UART3 Reception/ACK
UART4 Reception/ACK
, 1
0
Condition(UART2)
(UART0, UART3)
(UART1, UART4)
2
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
Timer B3
Timer B4
Timer B5
0
DMA0
DMA1
DMA2
DMA3
INT5
INT4
INT3
INT2
INT1
INT0
0
5
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Level 0 (Initial Value)
f o
3
3
0
Each Interrupt Priority Level
Oscillation Stop Detection
Intelligent I/O Interrupt 2
Intelligent I/O Interrupt 3
Intelligent I/O Interrupt 4
Intelligent I/O Interrupt 0
Intelligent I/O Interrupt 1
RLVL2 to RLVL0 Bits
Watchdog Timer,
Key Input Interrupt
Address Match
DMAC II
I Flag
A/D0
NMI
IPL
Interrupt request priority
detection results output
(to the clock generation
circuit)
Interrupt request
acknowledged
(to CPU)
10. Interrupts