M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 214

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP-BL#U5

Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
NSC
Quantity:
78
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R
R
M
e
E
3
. v
J
2
Table 16.14 I
0
S
N
S (
S
N
a
S (
S
N
a
S (
D
R
U
D
P
P
P
P
P
P
N
R
P
D
S
S
S
S (
S
R
h t
V
C
i=0 to 4
NOTES:
1
9
n
n
e
o
u
o
u
o
u
a
A
e
6
n i
6
n i
6
n i
o
e
n i
e
D
C
a
o
o t
e
e
e
e
e
e
0 .
d
d
a t
g
8 /
u
u
u
3
2
1
a
u
a
B
m
m
m
a l
s i
a f
u l
R
i A
i L
e r
e
e
e
U
e
s i
,
,
,
F
F
F
L
c r
c r
c r
d
c r
d
1. Use the following procedure to change what causes an interrupt to be generated.
2. Set default value of the SDAi output when the SMD2 to SMD0 bits in the UiMR register are set to "000
3. Second data transfer to the UiRB register (on the rising edge of the ninth bit of SCLi).
4. First data transfer to the UiRB register (on the falling edge of the ninth bit of SCLi).
3
3
e
b
b
i T
y
e
0
b
T
A
u
0
r e t
P
P
P
e
0
u
u
u
n i
n i
F
F
F
F
(a) Disable interrupt of corresponding interrupt number.
(b) Change what causes an interrupt to be generated.
(c) Set the IR bit of a corresponding interrupt number to "0" (no interrupt requested).
(d) Set the ILVL2 to ILVL0 bits of a corresponding interrupt number.
7
8
D
R
O
e
e
e
r e
e
e
a r
t l
e
2
R
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v
6
n
6
n
6
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g i
g i
g i
g i
(
(
g
g
s r
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T
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(serial I/O disabled).
) 1
) 1
e
u
7
s n
T
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7
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6
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5
t c
t l i
V
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t i
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a
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d
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g
, 3
t p
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a t
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h
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2
C Mode Functions
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d
a
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3
g
5
m
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5
r e t
5
Page 193
I
U
U
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f o
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2
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b
16. Serial I/O (Special Function)
C
-
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o i
o i
8
e l
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f o
n i
9
9
n
m
n
n i
h t
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h t
U
-
o
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(
6
U
N
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L
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1 .
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T
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6
c
H
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e
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S
S
B
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(
d
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v i
T
e
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t i
s t
1
n i l
t i
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c
C
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8
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b
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7

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