M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 71

IC M32C/80 MCU ROMLESS 100LQFP

M30800SAGP-BL#U5

Manufacturer Part Number
M30800SAGP-BL#U5
Description
IC M32C/80 MCU ROMLESS 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M30800SAGP-BL#U5

Core Processor
M16C/80
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
45
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
NSC
Quantity:
78
Company:
Part Number:
M30800SAGP-BL#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M
R
R
e
E
3
. v
J
2
Figure 7.7 Bus Cycle with Multiplexed Bus (1)
0
C
1
9
0 .
8 /
B
0
• Bus Cycle 2 + 2
0
0
• Bus Cycle 2 + 5
2
7
G
N
1
o
o r
0 -
. v
u
Data (Read)
Data (Read)
Data (Write)
Data (Write)
1
i=0 to 3
NOTE:
LA : Latch Address
WR (WRL)
WR (WRL)
p
0
0
, 1
0
1. When the microcomputer continuously accesses the same CS area, the CSi pin outputs an "L" signal continuously.
BCLK
BCLK
CS
CS
2
RD
RD
ALE
ALE
0
i
i
0
(1)
(1)
5
Page 50
LA
LA
LA
LA
1 bus cycle = 4
f o
RD : ReadData
1 bus cycle = 7
3
3
WD
0
RD
WD
WD : Write Data
RD
• Bus Cycle 2 + 3
Data (Read)
Data (Write)
WR (WRL)
BCLK
CS
RD
ALE
i
(1)
LA
LA
1 bus cycle = 5
WD
RD
7. Bus

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