M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 223

• Manufacturer Part Number: M30800SAGP-BL#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
3
. v
J
2
Table 16.21 Pin Settings in Special Mode 2 (1)
Table 16.22 Pin Settings (2)
Table 16.23 Pin Settings (3)
0
C
NOTE:
NOTE:
P6
P6
P6
P6
P6
P6
P6
P6
P7
P7
P7
P7
P9
P9
P9
P9
P9
P9
P9
P9
1
9
8 /
0 .
B
Port
1. P7
1. Set the PD9 and PS3 registers immediately after the PRC2 bit in the PRCR register is set to "1" (write enabled). Do
Port
0 (1)
1 (1)
0
1
2
3
4
5
6
7
2
3
0
1
2
3
4
5
6
7
0
Port
0
0
2
not generate an interrupt or a DMA transfer between the instruction to set to the PRC2 bit to "1" and the instruction to
set the PD9 and PS3 registers.
G
7
N
1
o
o r
0
0 -
. v
and P7
u
1
0
p
0
, 1
0
SS0 input
CLK0 input (slave)
CLK0 output (master) PS0_1=1
RxD0 input (master)
STxD0 output (slave) PS0_2=1
TxD0 output (master) PS0_3=1
SRxD0 input (slave)
SS1 input
CLK1 input (slave)
CLK1 output (master) PS0_5=1
RxD1 input (master)
STxD1 output (slave) PS0_6=1
TxD1 output (master) PS0_7=1
SRxD1 input (slave)
TxD2 output (master)
SRxD2 input (slave)
RxD2 input (master)
STxD2 output (slave)
CLK2 input (slave)
CLK2 output (master) PS1_2=1
SS2 input
CLK3 input (slave)
CLK3 output (master) PS3_0=1
RxD3 input (master)
STxD3 output (slave)
TxD3 output (master)
SRxD3 input (slave)
SS3 input
_______
SS4 input
CLK4 input (slave)
CLK4 output (master) PS3_5=1
TxD4 output (master)
SRxD4 input (slave)
RxD4 input (master)
STxD4 output (slave)
______
______
______
______
2
0
1
0
Function
are ports for the N-channel open drain output.
Function
Function
5
Page 202
f o
3
PS0_0=0
PS0_1=0
PS0_2=0
PS0_3=0
PS0_4=0
PS0_5=0
PS0_6=0
PS0_7=0
3
PS0 Register
PS1 Register
PS1_0=1
PS1_0=0
PS1_1=0
PS1_1=1
PS1_2=0
PS1_3=0
PS3 Register
PS3_0=0
PS3_1=0
PS3_1=1
PS3_2=1
PS3_2=0
PS3_3=0
PS3_4=0
PS3_5=0
PS3_6=1
PS3_6=0
PS3_7=0
PS3_7=1
0
(1)
PSL0 Register
PSL0_2=1
–
–
PSL0_6=1
–
–
PSL3 Register
–
–
–
PSL3_1=1
PSL3_2=0
–
PSL3_3=0
PSL3_4=0
PSL3_5=0
–
–
PSL3_6=0
–
PSL3_7=1
–
–
–
–
–
–
–
–
PSL1 Register
PSL1_0=0
–
–
PSL1_1=1
–
PSL1_2=0
–
Setting
Setting
Setting
PSC Register
PSC_0=0
–
–
PSC_1=0
–
PSC_2=0
PSC3 Register
–
–
–
–
–
–
–
–
–
–
PSC3_6=0
–
–
–
–
PD6 Register
PD6_0=0
PD6_1=0
–
PD6_2=0
–
–
PD6_3=0
PD6_4=0
PD6_5=0
–
PD6_6=0
–
–
PD6_7=0
16. Serial I/O (Special Function)
PD7 Register
–
PD7_0=0
PD7_1=0
–
PD7_2=0
–
PD7_3=0
PD9 Register
PD9_0=0
–
PD9_1=0
–
–
PD9_2=0
PD9_3=0
PD9_4=0
PD9_5=0
–
–
PD9_6=0
PD9_7=0
–
(1)