M30800SAGP-BL#U5 Renesas Electronics America, M30800SAGP-BL#U5 Datasheet - Page 272

• Manufacturer Part Number: M30800SAGP-BL#U5
• Description: IC M32C/80 MCU ROMLESS 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M30800SAGP-BL#U5

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 45
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

M
R
R
e
E
3
. v
J
2
Figure 21.7 G0ERC and G1ERC Registers
0
C
1
9
0 .
8 /
B
0
0
0
2
7
G
N
1
o
o r
0 -
SI/O Expansion Receive Control Register i
. v
b7
NOTES:
u
1
0
p
0
b6
1. The GiERC register is used in HDLC data processing mode.
2. Set the CMP3E bit to "1" to set the ACRC bit in the GiEMR register to "1" (CRC reset function used).
, 1
0
Set to "0010 0000
2
b5
0
0
b4
5
b3
Page 251
b2
b1
2
b0
" in clock synchronous serial I/O mode.
f o
CMP1E
CMP2E
RCRCE
CMP0E
CMP3E
RSHTE
RBSF0
RBSF1
Symbol
3
3
Bit
0
Symbol
G0ERC, G1ERC
Receive Bit
Stuffing "1" Delete
Select Bit
Receive Bit
Stuffing "0" Delete
Select Bit
Data Compare
Function 2
Select Bit
Data Compare
Function 3
Select Bit
Receive CRC
Enable Bit
Receive Shift
Operation
Enable Bit
Data Compare
Function 0
Select Bit
Data Compare
Function 1
Select Bit
Bit Name
Address
00FD
0: The GiDR register (receive data register) is
1: The GiDR register is compared with the
0: The GiDR register (receive data register) is
1: The GiDR register is compared with the
0: The GiDR register (receive data register) is
1: The GiDR register is compared with the
0: Not used
1: Used
0: Receive shift operation disabled
1: Receive shift operation enabled
0: "1" is not deleted
1: "1" is deleted
0: "0" is not deleted
1: "0" is deleted
0: The GiDR register (receive data register) is
1: The GiDR register is compared with the
16
not compared with the GiCMP0 register
not compared with the GiCMP1 register
not compared with the GiCMP2 register
GiCMP1 register
GiCMP2 register
GiCMP0 register
, 013D
not compared with the GiCMP3 register
GiCMP3 register
(i=0,1)
16
21. Intelligent I/O (Communication Function)
(1)
Function
(2)
After Reset
00
16
RW
RW
RW
RW
RW
RW
RW
RW
RW