HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 485

IC H8S MCU FLASH 256K 144-QFP

HD64F2676VFC33

Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2676VFC33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2676VFC33
Manufacturer:
RENESAS
Quantity:
5 530
Part Number:
HD64F2676VFC33
Quantity:
9 520
Part Number:
HD64F2676VFC33
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F2676VFC33V
Manufacturer:
RENESAS
Quantity:
5 530
Part Number:
HD64F2676VFC33V
Manufacturer:
ROHM
Quantity:
750 000
Part Number:
HD64F2676VFC33V
Manufacturer:
RENESAS
Quantity:
120
Part Number:
HD64F2676VFC33V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
10.1.2
P1DR stores output data for the port 1 pins.
10.1.3
PORT1 shows the pin states.
PORT1 cannot be modified.
Note:
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
P17DR
P16DR
P15DR
P14DR
P13DR
P12DR
P11DR
P10DR
Bit Name
P17
P16
P15
P14
P13
P12
P11
P10
* Determined by the states of pins P17 to P10.
Port 1 Data Register (P1DR)
Port 1 Register (PORT1)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
Description
Output data for a pin is stored when the pin function
is specified to a general purpose I/O.
Description
If a port 1 read is performed while P1DDR bits are
set to 1, the P1DR values are read. If a port 1 read
is performed while P1DDR bits are cleared to 0, the
pin states are read.
Rev. 3.00 Mar 17, 2006 page 433 of 926
Section 10 I/O Ports
REJ09B0283-0300

Related parts for HD64F2676VFC33