HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 611

• Manufacturer Part Number: HD64F2676VFC33
• Description: IC H8S MCU FLASH 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2676VFC33

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

11.4
11.4.1
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, periodic counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
Counter Operation: When one of bits CST0 to CST5 is set to 1 in TSTR, the TCNT counter for
the corresponding channel starts counting. TCNT can operate as a free-running counter, periodic
counter, and so on.
1. Example of count operation setting procedure
Figure 11.2 shows an example of the count operation setting procedure.
Select output compare register
Select counter clearing source
Select counter clock
Operation selection
<Periodic counter>
Operation
Basic Functions
Periodic counter
Start count
Set period
Figure 11.2 Example of Counter Operation Setting Procedure
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count
Section 11 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Mar 17, 2006 page 559 of 926
[5]
[1]
[2]
[3]
[4]
[5]
Select the counter
clock with bits
TPSC2 to TPSC0 in
TCR. At the same
time, select the
input clock edge
with bits CKEG1
and CKEG0 in TCR.
For periodic counter
operation, select the
TGR to be used as
the TCNT clearing
source with bits
CCLR2 to CCLR0 in
TCR.
Designate the TGR
selected in [2] as an
output compare
register by means of
TIOR.
Set the periodic
counter cycle in the
TGR selected in [2].
Set the CST bit in
TSTR to 1 to start
the counter
operation.
REJ09B0283-0300