HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 67

• Manufacturer Part Number: HD64F2676VFC33
• Description: IC H8S MCU FLASH 256K 144-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2676VFC33

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: IrDA, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 103
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b; D/A 4x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Type
Bus control
Symbol
RD
HWR
LWR
UCAS
LCAS
DQMU
DQML
RAS/
RAS2
RAS3 to
RAS5
RAS
FP-144G
(H8S/2678
Group)
90
89
88
86
87
—
—
—
—
Pin No.
FP-144H
(H8S/2678R
Group)
90
89
88
86
87
86
87
103 to 106
103
I/O
Output When this pin is low, it indicates that
Output Strobe signal indicating that external
Output Strobe signal indicating that external
Output Upper column address strobe signal
Output Lower column address strobe signal
Output Upper data mask enable signal for
Output Lower-data mask enable signal for
Output Row address strobe signal for the
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Function
the external address space is being
read.
address space is to be written, and
the upper half (D15 to D8) of the
data bus is enabled.
Write enable signal for DRAM
interface space.
address space is to be written, and
the lower half (D7 to D0) of the data
bus is enabled.
for 16-bit DRAM interface space.
Column address strobe signal for 8-
bit DRAM interface space.
for 16-bit DRAM interface space.
16-bit synchronous DRAM for 16-bit
synchronous DRAM interface.
Data mask enable signal for 8-bit
synchronous DRAM interface
space.
16-bit synchronous DRAM interface
space.
synchronous DRAM interface.
RAS signal is a row address strobe
signal when areas 2 to 5 are set to
the continuous DRAM space.
Row address strobe signal for the
synchronous DRAM of the
synchronous DRAM interface.
Section 1 Overview
REJ09B0283-0300