HD64F2676VFC33 Renesas Electronics America, HD64F2676VFC33 Datasheet - Page 846

IC H8S MCU FLASH 256K 144-QFP

HD64F2676VFC33

Manufacturer Part Number
HD64F2676VFC33
Description
IC H8S MCU FLASH 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2676VFC33

Core Processor
H8S/2600
Core Size
16-Bit
Speed
33MHz
Connectivity
IrDA, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
103
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 19 Flash Memory (F-ZTAT Version)
3. After the program data has been confirmed, the RAMS bit is cleared, thus releasing RAM
4. The data written in the overlapping RAM is written into the flash memory space (EB0).
Example in which flash memory block is overlapped is shown in figure 19.9.
1. The RAM area to be overlapped is fixed at a 4-kbyte area in the range of H'FFA000 to
2. The flash memory area to overlap is selected by RAMER from a 4-kbyte area among one of
3. The overlapped RAM area can be accessed from both the flash memory addresses and RAM
Notes: 1. When the RAMS bit in RAMER is set to 1, program/erase protection is enabled for all
Rev. 3.00 Mar 17, 2006 page 794 of 926
REJ09B0283-0300
overlap.
H'FFAFFF.
the EB0 to EB7 blocks.
addresses.
2. A RAM area cannot be erased by execution of software in accordance with the erase
flash memory blocks (emulation protection). In this state, setting the P or E bit in
FLMCR1 to 1 does not cause a transition to program mode or erase mode.
algorithm.
Figure 19.8 Flowchart for Flash Memory Emulation in RAM
No
Execute application program
Write tuning data to overlap
Start of emulation program
End of emulation program
Write to flash memory
emulation block
Clear RAMER
Set RAMER
Tuning OK?
RAM
Yes

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