EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 1146

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

1–64
Table 1–53. Glossary Table (Part 2 of 4)
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
M, N, O
Letter
K, L,
P
Q
R
J
J
JTAG Timing
Specifications
PLL
Specifications
R
L
Subject
—
—
High-speed I/O block: Deserialization factor (width of parallel data bus).
JTAG Timing Specifications:
Diagram of PLL Specifications
Note:
(1) Core Clock can only be fed by dedicated clock input pins or PLL outputs.
Receiver differential input discrete resistor (external to Stratix IV device).
TMS
TDO
TCK
TDI
Core Clock
Key
CLK
Reconfigurable in User Mode
t
JCH
t
JPZX
t
JCP
t
JCL
Switchover
f
IN
External Feedback
N
t
JPCO
f
INPFD
(1)
t
JPSU
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
PFD
M
Definitions
CP
—
—
t
LF
JPH
VCO
f
VCO
t
JPXZ
Counters
C0..C9
CLKOUT Pins
f
f
OUT_EXT
OUT
April 2011 Altera Corporation
GCLK
RCLK
Glossary