EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 81

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off.
and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
SIV51004-3.1
Stratix IV Device Handbook Volume 1
February 2011
February 2011
SIV51004-3.1
This chapter describes how the Stratix
blocks are optimized to support DSP applications requiring high data throughput,
such as finite impulse response (FIR) filters, infinite impulse response (IIR) filters, fast
Fourier transform (FFT) functions, and encoders. You can configure the DSP blocks to
implement one of several operational modes to suit your application. The built-in
shift register chain, multipliers, and adders/subtractors minimize the amount of
external logic to implement these functions, resulting in efficient resource usage and
improved performance and data throughput for DSP applications.
Many complex systems, such as WiMAX, 3GPP WCDMA, high-performance
computing (HPC), voice over Internet protocol (VoIP), H.264 video compression,
medical imaging, and HDTV use sophisticated digital signal processing techniques,
which typically require a large number of mathematical computations. Stratix IV
devices are ideally suited for these tasks because the DSP blocks consist of a
combination of dedicated elements that perform multiplication, addition, subtraction,
accumulation, summation, and dynamic shift operations.
Along with the high-performance Stratix IV soft logic fabric and TriMatrix memory
structures, you can configure DSP blocks to build sophisticated fixed-point and
floating-point arithmetic functions. These can be manipulated easily to implement
common, larger computationally intensive subsystems such as FIR filters, complex
FIR filters, IIR filters, FFT functions, and discrete cosine transform (DCT) functions.
This chapter contains the following sections:
■
■
■
■
■
■
“Stratix IV DSP Block Overview” on page 4–2
“Stratix IV Simplified DSP Operation” on page 4–4
“Stratix IV Operational Modes Overview” on page 4–8
“Stratix IV DSP Block Resource Descriptions” on page 4–9
“Stratix IV Operational Mode Descriptions” on page 4–15
“Software Support” on page 4–35
4. DSP Blocks in Stratix IV Devices
®
IV device digital signal processing (DSP)
Subscribe