EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 574

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

1–130
Figure 1–107. Stratix IV GX and GT Transceiver Datapath in PCIe ×1 Mode
Table 1–46. Stratix IV GX and GT Transceiver Datapath Clock Frequencies in PCIe Mode
Stratix IV Device Handbook Volume 2: Transceivers
PCIe ×1, ×4, and ×8
(Gen1)
PCIe ×1, ×4, and ×8
(Gen2)
Note to
(1) In PCIe functional mode at Gen2 (5 Gbps) data rate, the byte serializer/deserializer cannot be bypassed.
Fabric
FPGA
Functional Mode
Table
Interface Clock
FPGA Fabric
Transceiver
1–46:
PCIe Mode Datapath
Figure 1–107
in PCIe functional mode.
For more information, refer to
page
Table 1–46
configured using the ALTGX MegaWizard Plug-In Manager.
1–77.
Data Rate
2.5 Gbps
5 Gbps
FPGA Fabric
lists the transceiver datapath clock frequencies in PCIe functional mode
tx_clkout[0]
wrclk
Compensation
shows the Stratix IV GX and GT transceiver datapath when configured
TX Phase
FIFO
rdclk
High-Speed Serial
Clock Frequency
1.25 GHz
2.5 GHz
/2
wrclk
Byte Serializer
“Rate Match (Clock Rate Compensation) FIFO” on
/2
Transmitter Channel Datapath
Receiver Channel Datapath
Receiver Channel PCS
Transmitter Channel PCS
rdclk
Parallel Recovered
8B/10B
8B/10B
8B/10B
Parallel Clock
Low-Speed
Frequency
Clock and
250 MHz
500 MHz
Chapter 1: Transceiver Architecture in Stratix IV Devices
8B/10B Encoder
Low-Speed Parallel Clock
Low -Speed Parallel Clock
Parallel Recovery Clock
Without Byte
Deserializer
(8 Bit Wide)
Serializer/
Interface Clock Frequency
250 MHz
N/A
FPGA Fabric-Transceiver
February 2011 Altera Corporation
(1)
Transceiver Block Architecture
(16 Bit Wide)
Deserializer
Serializer/
With Byte
125 MHz
250 MHz
Transmitter Channel
Receiver Channel
High-Speed
Serial Clock
PMA
PMA