EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 569
EP4SE530H40I3
Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(72 pages)
6.EP4SE230F29C3N.pdf
(12 pages)
Specifications of EP4SE530H40I3
Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4SE530H40I3
Manufacturer:
ALTERA
Quantity:
325
Company:
Part Number:
EP4SE530H40I3N
Manufacturer:
SHARP
Quantity:
1 200
Company:
Part Number:
EP4SE530H40I3N
Manufacturer:
ALTERA
Quantity:
490
Part Number:
EP4SE530H40I3N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
- EP4SGX110DF29C3N PDF datasheet
- EP4SGX110DF29C3N PDF datasheet #2
- EP4SGX110DF29C3N PDF datasheet #3
- EP4SGX110DF29C3N PDF datasheet #4
- EP4SGX110DF29C3N PDF datasheet #5
- EP4SE230F29C3N PDF datasheet #6
- Current page: 569 of 1154
- Download datasheet (32Mb)
Chapter 1: Transceiver Architecture in Stratix IV Devices
Transceiver Block Architecture
Figure 1–104. BTS in OSBAL
Note to
(1) “RP” means Reference Point.
February 2011 Altera Corporation
Figure
1–104:
Proprietary
Module(s)
Interface
Transport Module
If the destination for high-speed serial data leaving the REC is the first RE, it is a
single-hop connection. If serial data from the REC has to traverse through multiple
REs before reaching the destination RE, it is a multi-hop connection. Remotely
locating the RF transceiver from the main base station introduces a complexity with
overall system delay. CPRI specification requires that the accuracy of measurement of
round-trip delay on single-hop and multi-hop connections be within ±16.276 ns in
order to properly estimate the cable delay. For a single-hop system, this allows a
variation in round-trip delay of up to ±16.276 ns. For multi-hop systems however, the
allowed delay variation is divided among number of hops in the connection—
typically equal to ±16.276 ns/ (# of hops), but not always equally divided among the
hops. Deterministic latency on a CPRI link also enables highly accurate triangulation
of a caller ’s location.
The OBSAI was established by several OEM’s for developing a set of specifications
that can be used for configuring and connecting common modules into base
transceiver stations (BTS). The BTS has four main modules—radio frequency (RF),
baseband, control and transport.
Figure 1–104
using portable devices and converts them to digital data. The baseband module
processes the encoded signal and brings it back to baseband before transmitting it to
the terrestrial network using the transport module. Coordination between these three
functions is maintained by a control module.
Switch
& Clock
Control
shows a typical BTS. The radio frequency module (RFM) receives signals
RP2 (1)
Power System
Baseband
Module
BB
System Software
RP1 (1)
Clock and Sync
RP3 (1)
RF Module
RFM
Stratix IV Device Handbook Volume 2: Transceivers
Module
Control
1–125
Related parts for EP4SE530H40I3
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: